| Publication Details |
Journal Details:
- 1. Mohd Ali, J. S., Gopinath, N. P., Vijayakumar, K., et al., “Improved Dual Boost Mid-Point Clamped Five-Level Inverter Topology," IEEE Transactions on Circuits and Systems II: Express Briefs, doi: 10.1109/TCSII.2024.3356171. (SCI IF:4.4)
- 2. J. S. M. Ali, A. R. Khan, Gopinath, N. P., P. Ponnusamy, F. S. Alamri and S. A. Bahaj, "A 7L and 11L High Step-Up SCMLI Topology with Reduced Component Voltage Stress,” IEEE Access, vol. 11, pp. 139785-139797, 2023, doi: 10.1109/ACCESS.2023.3333363. (SCIE IF:3.9)
- 3. Gopinath, N. P., Vijayakumar, K., Mohd Ali, J. S., Raghupathi, K., & Selvam, S, “A Triple Boost Seven-Level Common Ground Transformerless Inverter Topology for Grid-Connected Photovoltaic Applications,” Energies, 16(8), 3428, 2023. (SCIE IF: 3.2)
- . 4. Gopinath, N. P., & Vijayakumar, K., “Dual-ground transformerless nine-level dynamic voltage boosting inverter topology,” International Journal of Electronics (Taylor and Francis), 1-20, 2023. (SCIE IF: 1.3)
- 5. Gopinath, N. P., Krishnasamy, V., Ali, J. S. M., Mahmood, F. M., & Almakhles, D. “Single‐phase common ground type 5L inverter with reduced capacitor voltage stress for photovoltaic applications,” IET Power Electronics, 16(5), 883-892, 2023. (SCIE IF: 2)
- 6. Gopinath, N. P., & Vijayakumar, K., “Common ground nine-level boost inverter for grid-connected PV applications,” Frontiers in Energy Research, 10, 922786, 2022. (SCIE IF: 3.4)
- 7. Gopinath, N. P., Krishnasamy, V., Sathik, J., & Almakhles, D, “Five-Level Transformerless Common Ground Type Inverter with Reduced Device Count,” Informacije MIDEM, 52(2), 71-82, 2022. (SCIE IF: 1.22)
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